ENGR 204 Digital Logic Design
An introduction to digital logic system design. Design, minimize, and simulate both combinational and sequential circuits using a Hardware Description Language (HDL). The course emphasizes practical implementation, moving from theoretical logic gates to deploying complex designs on Field Programmable Gate Arrays (FPGA), utilizing industry-standard simulation and synthesis tools.
Prerequisite
MTH 231 Elements of Discrete Mathematics or
MTH 251Z Differential Calculus with a grade of C or better.
Notes
Lower Division Transfer (LDT) Course
Outcomes
Upon successful completion of this course, students will be able to:
Perform arithmetic operations with signed integers represented in binary. Analyze and design combinational systems of at least 4 inputs using standard gates and minimization methods (such as Karnaugh maps). Analyze and design finite state machines from a high-level description of a digital system. Analyze and design sequential systems composed of standard sequential modules, such as counters and registers. Map the high-level description of a digital system into a binary description of it. Implement and test combinational and sequential circuits using current laboratory equipment and testing techniques.